Voltage distortion detection and control for hvdc converter

ABSTRACT

A method and apparatus for controlling line voltage commutated, thyristor bridge power converters operated in the inverting mode comprising sampling the value of the thyristor valve commutating voltage appearing across the respective thyristor valves at a particular point in a cycle in advance of commutation, comparing the instantaneous value of a freshly sampled thyristor valve voltage to a stored value of the valve voltage of the previously conducting thyristor valve, detecting any difference between the instantaneous and stored values of valve voltage for use as an output error control signal, and directly applying the output error control signal back to control the firing angle of advance Beta of the next thyristor valve to fire in the power converter. The power converter is normally controlled by a main or normal control regulation loop having a relatively slow speed of response and the output error control signal from the comparison circuit is supplied back directly in parallel with and in addition to the normal control regulation loop as a fast responding control capable of controlling the firing angle of advance Beta of the next thyristor valve to be rendered conductive in the power converter.

United States Patent mi Chadwick 3,737,763 it June 5, 1973 [54] VOLTAGE DISTORTION DETECTION OTHER PUBLICATIONS AND CONTROL FOR HVDC IEEE Trans. On Power Applications and Systems "A CONVERTER Refined nvnc Control System Vol. PAS-89, No. 75 Inventor: Philip Chadwick, Media, Pa. 5/6 May/June 1970;pgs- [73] Assignee: General Electric Company, Philadelprimary Goldberg Phla, Attorney-J. Wesley Haubner, Albert s Richard- [2-2] Filed: Apt 13 1972 son, Jr., Frank L. Neuhauser et al.

[ pp 243,748 57] ABSTRACT Related US. Application Data A method and apparatus for controlling line voltage commutated, thyristor bridge power converters [63] g a of 144917 May operated in the inverting mode comprising sampling a an one the value of the thyristor valve commutating voltage appearing across the respective thyristor valves at a [52] US. Cl. ..321/ll,33221l//35 332211//l,3(5 particular point in a cycle in advance of commutation comparing the instantaneous vvalue of a freshly sam- [51] Int. Cl.I ..H02m 1/08, H02m 7/48 pled thyristor valve voltage to a storedvalue of the 0 Search A, 5 E, 11, valve voltage of the previously conducting thyristor 321/121338'4042 valve, detecting any difference between the instantaneous and stored values of valve voltage for use as [56] References Cited an output error control signal, and directly applying UNITED STATES PATENTS the output error control signal back to control the firing angle of advance B of the next thyristor valve to 3,399,337 8/1968 Stone ..32l/5 A fire in the power converter. The power converter is 3,465,234 9/1969 Phadke i ..32l/5 E normally controlled by a main or normal control regu- 3,456,525 9/19159 Ainswoflh A lation loop having a relatively slow speed of response Ekstrom and the output error control signal from com 3,551,778 12/1920 Ek8tI'Om.....,a.l 32163; p -i i i i pp back i ly in p l 3582755 6/19 1 vEkmom "321/4 with and in addition to the normal control regulation FOREIGN PATENTS 0R APPLICATIONS loopas a fast responding control capable of coni i troll ng the firm angle of advance fi of the next 1,124,263 8/1968 Great Britain .321 /40 thyristor valve to e rendered conduct m the Power 1,230,974 "571971 Great Britain ..321/40 nverter.

14 Claims, 3 Drawing Figures fA'EDfiiC/r '1 vrs losc.) -i6v /i[r.

ls L/M/r /J VOLTAGE DISTORTION DETECTION AND CONTROL FOR HVDC CONVERTER This is a continuation of my US. application Ser. No. 144,017 filed May 17, 1971 and now abandoned.

BACKGROUND OF INVENTION tecting such voltage distortion on the available commutating waveform and rapidly advancing thefiring angle of advance [3 for the next thyristor valve to be fired in the converter, the risk of commutation failure can be minimized.

I PRIOR ART PROBLEMS In almost all alternating current systems it is a reasonable certainty that some transient disturbances in the form of harmonics, etc will appear in the system during normal operation periods. Upon these occassions, voltagedistortion of the alternating current waveform results which may be of a magnitude sufficient to cause commutation failure of a line voltage commutated converter operating in the inverting mode on or near the minimum margin angle (e.g., operating on minimum margin angle control). To prevent such commutation failures upon the occurrence of such transient disturbances, the present valve voltage distortion detection and control circuit was devised.

SUMMARY OF INVENTION It is therefor a primary object of the present invention to provide a novel voltage distortion detection and control circuit for use with HVDC converters and the like; however, while the circuit is described as being designed primarily for use with l-lVDC power converters, it is in no way limited to such use and may be employed with other types of thyristor power converters such as reversible rolling mill drive controls, etc.

A further object of the invention is to provide a novel voltage distortion and control circuit for power converters which is fast acting in response to the occurrence of transient disturbances on the AC system a nd rapidly advances the firing angle'of advance B for the next thyris'to'rvalve to be-fired in"-.the power converter bridgesubsequent to detection of the AC system voltage waveform distortion. In this manner severe reductions in commutating voltage are anticipated and commutation is begun soon enough to provide an extra long commutation interval and still leave an adequate margin angle that assures safe turn-off of the next thyristor valve to be commutated off.

In practicing the invention a method and apparatus for controlling line voltage commutated, thyristor bridge power converters of the type comprising a plurality of successively conducting thyristor valves and operated in the inverting mode, is described. The

method and apparatus includes sampling the value of use as an output error control signal. This output error control signal is directly applied back in parallel with and in addition to the normal control regulation loop of the power converter as a fast responding control capable of advancing the firing angle [3 of the next thyristor valve to be fired in the bridge.

The voltage distortion detection and control circuit is comprised by valve voltage sampling means for sampling the value of the commutating voltage across the respective thyristor valves of the power converter bridge. Circuit means are provided for developing a sample point switching signal that is indicative of a particular point in the waveform of the thyristor valve commutating voltage where the value of the commutating voltage will be sampled. The value of the commutating voltage is stored from one thyristor valve firing interval to the next in a sample signal storage means through a suitable switching circuit means responsive to both the valve voltage sampling means and the sample point switching signal. A comparison circuit means is coupled to the valve voltage sample storage means (which comprises a capacitor) and also to the instantaneous output from the switching circuit means and serves to compare the instantaneous value of a sample valve voltage to the stored sample valve voltage of the previously conducting thyristor valve and to derive an output error signal indicative of any difference for use in controlling the operation of the power converter.

The power converter includes firing time computer means for supplying appropriately time firing signals to control conduction of respective thyristor valves in the bridge power converter. The firing time computer means includes controllable B limit circuits for limiting the angle of advance B of the thyristor valve to a normal B value and the output error control signal is applied directly to the controllable B limit circuit for directly increasing this value of the minimum B limit of the next fired thyristor valve in the converter to which commutation proceeds. The increase in the firing angle of advance [-3 of the next thyristor valve to be rendered conductive in the converter is in proportion to the value of the output error control signal derived from the comparison circuit means. The'control provided by the voltage'distortion detection and control circuit is in parallel withand in addition to the normal control regulation loop for controlling operation of the firing time computer at fast speeds of response in advance of the next valve firing. The minimum [3 limit then is reduced back down to the normal B value over a predetermined time constant within which the distortion condition normally should be cleared. Preferably, the circuit is designed for use with power converters at cycles/- sec and the means for developing a sample point BRIEF DESCRIPTION OF DRAWINGS Other objects, features, and many of the attendant advantages of this invention will be appreciated more readily as the same becomes better understood by reference to the following detailed description, when considered in connection with the accompanying drawings, wherein like parts in each of the several figures are identified by the same reference character, and wherein:

FIG. 1- is a functional block diagram of a voltage distortion detection and control circuit for use with line voltage commutated HVDC bridge power converters and the like, andconstructed in accordance with the invention;

FIG. 2 is a detailed circuit diagram of a voltage distortion detection and comparison circuit comprising the heart of the invention; and

FIG. 3 is a series of voltage waveforms appearing at different points in the circuits of FIGS. 1 and 2, and illustrates the manner of operation of the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS FIG. 1 is a functional block diagram of a novel AC system voltage distortion detection and control circuit for HVDC power converters and the like constructed in accordance with the invention. In FIG. 1, a line voltage commutated, transformer-coupled, thyristor bridge power converter is shown at the upper portion of the figure. The converter includes a bridge comprised of six thyristor valves 1-6 connected in pairs between two direct current conductors l1 and 12 and a set of threephase alternating current conductors R, B and Y. Conductors R, B and Y are connected to the phase windings R-N, Y-N and B-N of a three phase supply transformer (the primary winding of which is not shown) and which comprises a part of the AC system with which the HVDC power converter is used. The thyristor valves l-6 are cyclically fired (rendered conductive or tumed-on) in the numerical sequence indicated by their numbers and each valve comprises an ionic tube such as a thyr'at'ron, ignitron or the like or a solid state semiconductor valve such as a silicon controlled rectifier. Each of the valves l-6 may comprise either an individual thyristor device or a'plurality of such devices interconnected in series for high voltage and/or interconnected in parallel for high current, and whereso interconnected, are operated (rendered conductive) simultaneously in a manner known in the art. The power converter shown in FIG. 1 comprises a six-pulse bridge converter but, alternatively, may comprise a plurality.

of such bridges whose direct current terminals are interconnected in series and whose alternating current terminals are connected to appropriately phased power For a more detailed description of the construction and operation of power converters of the type discussed above and shown at 10 in FIG. 1, reference is made to the textbooks entitled High Voltage Direct Current Power Transmission" by C. Adamson and H. B. Hingorani (Garroway Ltd, London, 1960) and Principles of Inverter Circuits by B. D. Bedford and R. G. I-Ioft (John Wiley and Sons Inc, New York, 1964). Briefly however, it can be stated that the thyristor bridge power converter 10 is operated by controlling the timing of the firing pulses which cyclically are supplied to the gating means of the respective thyristor valves l-6 to render them conducting in numerical sequence. The time at which a valve is fired relative to the recurrent instants of zero crossings of the phaseto-phase voltage that appears across it prior to conduction (which voltage is also called the commutating voltage and has the general waveform shown in FIGS. 3a and 3b as will be described more fully hereinafter) is known as the firing angle. The firing angle can be expressed either as a delay angle alpha (or) which is measured in electrical degrees from the zero crossing at which the fundamental commutating voltage of the valve becomes positive (i.e., anode becomes positive with respect to cathode), or alternatively as an advance angle beta (B) measured in electrical degrees ahead of the cyclically recurring instant at which the voltage waveform would have crossed zero and gone negative if the valve had not been fired. The firing angle is advanced by increasing B and retarded by decreasing B. Commutation is the name given the transfer of load current from one valve (the relieved or outgoing valve) to the next-fired valve in the same half of the bridge (the relieving or incoming valve). With a delay angle a between zero and 7r/2, the power converter will be operated in the rectifying mode. If the angle of advance B is in a range between zero and 17/2 the power converter will operate in the inverting mode to supply electric power from the direct current source back into the alternating current system. The present invention is designed for use with power converters operated in the inverting mode and also may be used with any power inverter such as those employed for reversible rolling mill drives, standby power supplies, etc wherein AC system voltage distortion may be encountered, and the inverter is being operated on margin angle control.

The term margin angle control as used.hereinafter is considered to by synonymous with the term extinction angle control and at this point in the development of the art, such controls are well known. See, for example, the article entitled A New Constant Extinction Angle Control For AC/DC/AC Static Converters by N. G. Hingorani and P. Chadwick IEEE Transactions on Power Apparatus and Systems, Vol PAS 87, No. 3, March 1968, Pgs 866-872. Briefly, however, margin angle control can be described as follows. For safe inverter operation, the angle of advance B must be sufficiently great so that at the end of commutation the interval actually available between the cessation of conduction through the outgoing valve until the instant when that valve will again have to withstand a reapplied forward voltage is longer than a predetermined minimum time which is known in the art as the minimum critical deionization time (ionic tube) or reverserecovery time (thyristor valve). The interval referred to is commonly called the fmargin angle" (8) of the outgoing valve, and as used herein the term margin angle is intended to be a measure of time, not degrees. In order to assure that none of the valves in the inverter premagin angle have been developed. One such margin angle control means is described in the above referenced Hingorani and Chadwick IEEE article. Typically these known margin angle controls are arranged to perform- AC system voltage distortion presents a problem, but

is intended primarily for use in conjunction with margin angle regulation where it is known that the AC system voltage distortion could cause commutation failure and unsatisfactory inverter operation.

The respective thyristor valves of converter are sequentially fired by a family of firing pulses supplied to the control gates of the valves from a valve firing system (not shown) by a firing time computer (FTC) 13. The firing time computer comprises a variable frequency oscillator that is controlled by a regulator 14 and supplies properly timed control pulses to the valve firing system (VFS) for distribution to the control gates of the thyristor valves. The firing time computer 13 and regulator 14 may be of any known conventional type for deriving the required firing pulses whose angle of advance B will normally depend upon the value of an input error control signal which controls the regulator. Preferably, however, FTC 13 and regulator 14 are of the type described in a US. patent application assigned to the General Electric Company (1 lLAO-32lO-Pollard) pending concurrently herewith.

The regulator 14 is supplied with an input d.c. error control signal of varying magnitude from a summing junction 15 that has supplied to its input a feedback signal representative of the actual value of a quantity to be regulated and in addition a reference control signal which is representative of the desired value of that quantity. When operating in the inverter mode, constant margin angle regulation is ordinarily desired and the, minimum value of the actual margin angle in the converter will determine the magnitude of the feedback signal, although on occasion the feedback signal may reflect the value of direct current flowing in the direct current transmission lines 1 1-l2. Summing junction 15 sums together these two input controlling parameters and derives an output error control signal representative of any difference for controlling the operation of the regulator 14 and FTC 13. The control or regulation provided through summing junction 15, regulator l4 and FTC 13 isithe main or normal control regulation loop and undei normal operating conditions will properly control operation of the power converter by increasing or decreasing B as necessary to maintain the regulated quantity (margin angle) at the desired'j; constant value which the reference control signal determines. However, because of the design and characteristics of this normally used main control regulation loop, the control provided by this loop is relatively slow responding (extended over several thyristor valve conduction intervals) and hence may not bez'adequate to maintain stable operation of the converter in the presence of severe voltage distortion of the AC system voltage waveform. I

The circuit shown in FIG. 1 is-designed to immediately sense distortions in the AC system voltage and to quickly cause an increase in the angle of advance [3 of the next thyristor valve to be fired in the bridge. This increase is achieved via the [3 limit which immediately is moved out from the normal B setting to a maximum value, and then is allowed to reduce back to the minimum value B with any desired time constant. By thus immediately increasing the minimum B limit up to its maximum value which is higher than the value of B that the main regulation loop normally establishes the provision of an adequate margin angle to assure commutation of the then conducting thyristor valve, is assured. If the minimum B limit then is allowed to reduce back to B over some long time constant (e.g., 0.5

seconds for a 60 cycle system) the transient disturbance which caused the voltage distortion in the first instant will have had time to pass, and the AC system generally will have settled to a new steady state condition thereby enabling return to operation on margin angle control in which B has whatever value is required to yield a minimum error control signal from the summing junction 15. The manner in which this is achieved l2-pulse converter. Where two such voltage distortion detector circuits l6 and 16' are employed with a 12- pulse converter, the outputs of the two detector circuits are OR-gated together at the input of the B limit circuitry in the FTC 13 with the maximum distortion error signal being selected to control both bridges.

The construction and operation of the voltage distortion detector circuits l6'and 16' will be disclosed more fully hereinafter in conjunction with FIG. 2. At the present point in the description, however, it is sufficient to point out that the voltage distortion detector 16 is provided, with input, stepped down, commutating voltage sample signals indicated as R-Y, Y-R, Y-B, B-Y, B-R and RB from the center tap secondary windings of an auxiliary transformer 17 whose primary winding is inductively coupled to the respective phase windings RN, BN and YN of the supply transformer comprising a part of the bridge converter 10. These input sample commutating signals are stepped down in magnitude but are representative of the phase to phase commutating voltage waveshapes appearing across the respective thyristor valves 1-6 when each of these valves is not conducting. Thus, it will be appreciated that the auxil iary transformer 17 comprises a valve voltage sampling means for sampling the value of the commutating voltage of the respective thyristor valves.16.

18 comprises a secondtertiary transfrai mt-Ir 19 having its midtap grounded secondary windings appropriately interconnected through suitable level detecting and waveshaping circuits to the input to the voltage distortion detector 16. In a three phase alternating current system each of the phases is separated by 120. Hence, identification of the 120 sampling point readily may be obtained by merely sensing the passage through zero of the phase voltage displaced by 120, shape it, and apply it to detector 16 as the sample point switching signal. For this purpose, the primary winding of the auxiliary transformer 19 is connected to and supplied from appropriate tertiary windings inductively coupled to the three phase winding RN, BN and YN of the supply transformer comprising a part of the bridge power converter 10. For increased safety, two AC system monitors may be employed in place of one. In such case the redundant AC system monitors are cross connected so that the monitor for the primed bridge supplies detector l6 and the monitor for the unprimed bridge supplies detector 16'. With such an arrangement, should one set of monitors be taken out of service, the function could still be accomplished for the entire 12- pulse converter, although with some reduction in performance, by one voltage distortion detection circuit 16 or 16.

The operation of the voltage distortion detection and control circuit shown in FIG. 1 can best be understood in connection with the waveforms shown in FIG. 3 of the drawings. FIG.3a illustrates a series of positive half cycles of phase to phase commutating voltages that appear across the respective thyristor valves of the power converter during the successive valve firings. As illustrated in F IG.3a, the value of the commutating voltage across the respective thyristor valves is periodically sampled at a sample point selected to be a point corresponding to 120 relative to each commutating voltage waveform. At each 120 sample point, the thyristor valve commutating voltage is sensed and stored on a capacitor. As will be described more fully hereinafter, at the instant of sampling, the instantaneous value of the sensed thyristor valve commutating voltage is com-' pared to the value of the commutating voltage of the previously conducting thyristor valve. (The previously conducting valve is the one which in the normal firing sequence was turned on immediately preceding the valve whose commutating voltage is supplied.) If there is a substantial reduction in the newly sensed value, an output error control voltage is produced for use in controlling the converter. The voltage values appearing I under normal operating conditions. As explained more fully in the above identified Adamson and Hingorami text and in the IEEE article, the firing angle of advance B, which marks the point of ignition of the incoming thyristor valve of the pair whose commutating voltage is depicted, normally may be expected to be on the order of about 40 while operating the inverter under margin angle control. Upon firing the incoming valve 3, the commutating voltage causes load current to transfer from the cooperating outgoing valve 1 to the incoming valve in a known manner. The commutation angle 'y would then be expected to extend over some 22 leaving a margin angle 6 of about 18 for the outgoing valve to recover its blocking capability (during which interval the illustrated commutating voltage appears, with reverse polarity, across the outgoing valve 1). However, in the presence of an appreciable disturbance due to which the waveform of the commutating voltage may be distorted to appear in the manner shown in dotted outline form in FIG.3b and which is in excess of 15 percent below the normal voltage value at the sampling point, a longer intervel will be required for commutation and the margin angle 8 may be insufficient to assure full reverse recovery by the outgoing valve. The reason for sampling the commutating.

voltage waveform at the 120 point now becomes apparent since it leaves an angle of about 20 within which a fast responding control can be operated to increase the angle of advance B sufficiently to accommodate the decreased voltage available for commutation off of the particular thyristor valve in question. The result of course will be to advance both the commutation angle y and the margin angle 6 so as to assure safe turn off of the then conducting or out going thyristor and avoid a commutation failure with consequent unsatisfactory operation of the converter. With the present circuit design, any distortion less than approximately 15 percent is considered negligible and no corrective action is taken by the system.

FIG.3c of the drawings illustrates another badly distorted commutating voltage waveform which may be caused by harmonics present on the AC system side of the converter. In this voltage waveform the idealized normal commutating voltage is illustrated in dotted outline form with the harmonically disturbed voltage waveform being shown in solid lines. Because of the presence of the harmonics, an output sample obtained at the 120 sampling point will be substantially above the expected or normal commutating voltage value that would be produced if the commutating voltage were undisturbed. Thus, if only this single sample were taken at the 120 point a badly wave such as shown in FIG.3c might go undetected. To avoid this possibility, the detection circuit performs multiple samplings of the valve voltage, such as at the depression point V and at a later point V and the latter sample provides a second chance to actuate the control to provide for an increased firing angle of advance [3.

The manner in which multiple sampling of a badly distorted waveform such as shown in FIG.3c, is obtained, is best depicted in FIGS.3d and 3e. In FIG.3d, the waveform of the phase to phase voltage that is displaced l20 with respect to the commutating voltage of the valve in question, and hence the voltage that supplies the sample point switching signal, is illustrated in dotted outline form at V' However, if instead of following this idealized commutating voltage waveform, because of the presence of harmonics, the wavey, solid line waveform shown at V is followed, it will be seen that due to the harmonics multiple crossings of the zero voltage level in the positive going direction occur. The AC system monitor 18 employed in the voltage distortion detection and control circuit is the type utilizing a level detector for sensing the passage through zero in the positive going direction of this 120 phase displaced AC voltage. The output from the level detector is a squarewave-shaped signal whose leading edge is indicative of the point where the commutating voltage waveform passed through zero. Such AC system monitors are well known in the art and have been described in a number of publications such as in the above referenced Hingorani and Chadwick IEEE transaction. The resultant output switching signal from the AC system monitor will appear as shown in FIG.3e of the drawings wherein it can be seen that not one but two input switching signals will be supplied from the AC system monitor 18 to the voltage distortion detector 16 for badly distorted waveforms such as shown in FIG.3c. As a consequence, if an erroneously high sample value were established at the first sample point (which will be in the proximity of 120) by the voltage distortion detection circuit, because of the double switching action obtained from the AC system monitor 18, a second sample V will be obtained at a later point and in advance of the normal firing angle of advance [3 so as to allow sufficient time for the control to correct for the badly distorted commutating voltage.

FIG. 2 is a detailed circuit diagram showing the construction of a preferred form of the voltage distortion detector circuit 16 employed in the invention. This circuit is comprised by a thyristor valve voltage sample signal storage means comprised by a first storage capacitor 21 and a second storage capacitor 22 interconnected through a unity coupling circuit 23. The unity coupling circuit may be comprised by a conventional, commercially available integrated circuit, operational amplifier such as the 741 circuit chip manufactured and sold by the Fairchild Camera Company or some other similar integrated circuit, operational amplifier. The integrated operational amplifier 23 has its feedback circuit adjusted to provide unity gain and serves to couple the charge produced on capacitor 21 over to capacitor 22 through a blocking diode 24 that traps and stores the charge on capacitor 22.

The first storage capacitor 21 has one of its plates connected directly to a grounded terminal with the remaining plate being connected in common to the source electrodes of a plurality of bidirectional, field effect switching transistors 25a, 25b and 25c that coact with capacitors 21 and 22 and amplifier 23 as a conventional three input sample-hold circuit. A set of three dual, half-wave rectifying circuits 26a, 26b and 260 which full wave rectify the commutating voltages of the respective valve pairs, are connected to the drain electrodes of switching transistors 25a, 25b and 250 respectively, through resistive coupling networks that attenuate the valve voltage samples AC1 through AC-6 supplied to the switching transistors down to a predetermined level. The phase to phase commutating voltage samples AC-l through AC-6 obtained from the respective center-tapped secondary windings of the auxiliary transformer 17 shown in FIG. 1 are applied to the respective dualhalfwave rectifiers 26a-26c as inputs.

The sample point switching signals obtained from the AC system monitor 18 in FIG. 1 are supplied to the gate electrodes of the respective switching transistors 25a-25c via inverting driver transistors 30a, 30b and 300 through dual halfwave rectifier level sensing and' wave shaping circuits 27 27 and 27 connected to appropriate outputs. A, through A from the centertapped secondary windings of auxiliary transformer 19 in FIG. '1. In this manner, the gates of the switching field effect transistors 25a-25c are supplied with switching signals derived from those phase to phase voltages which are respectively displaced 120 in phase from the commutating voltages being sampled. Since in either a six pulse thyristor bridge converter or a twelve pulse converter there will be a thyristor valve commutating voltage waveform which will be displaced substantially in phase from the commutating voltage of any particular thyristor valve to be commutated off, it is necessary merely only to sense and shape the leading edge of that voltage for use as a sample point identifying switching signal.

The sensed switching potentials A through A derived from transformer 19 via the AC system monitor 18 are supplied through level sensing and shaping circuits 27a, 27b and 27c, respectively. Each of these level sensing and shaping circuits, for example 27a, is comprised by a resistor 41, capacitor 42, resistor 43 and diode 44 arranged to produce a constant amplitude positive pulse of about 10 microseconds duration at the leading edge of the input signal voltage from the transformer 19 secondary as the voltage passes through zero in the positive going direction as depicted in F1GS.3d and 3e. Of course, if only a single passage through zero occurs, only a single pulse will be produced, and this will be at the 120 sampling point under normal operating conditions with no AC system distortion. This input (labeled A occurs at the 120 sampling point for thyristor valve 3. Similarly, resistors 45 and 47, capacitor 46 and diode 48 develop a positive switching pulse at the leading edge of input A which is in direct antiphase to input A and provides the 120 sampling point for thyristor valve 6. These positive pulses associated with inputs A and A are passed in an OR manner to momentarily turn off transistor 300. Similar arrangements are provided for AC system monitor inputs A,, A and A A to drive transistors 30b and 300, as shown. Thus 30a, 30b and 30c are each turned off momentarily twice per cycle of commutating voltage, phased 60 apart in sequence.

During the short interval of time (10 microseconds) that transistor 30a is turned off, switching transistor 25a is turned on and capacitor 21 assumes the instantaneous voltage across resistors 51 and 52 at the output from resistive coupling circuit 26a. In this manner the commutating voltages for valves 3 and 6 are sampled at 0z=l 20, which for a firing angle B=40, is 20 before the firing point of the valve. Operation of transistors 30b and 30c afford similar samplings of commutating voltages for valves 2,5, and 1, 4, respectively. Therefore capacitor 21 and 22 store for a 60 period the instantaneous commutating voltages at F1200 for valves 1 through 6 in sequence. FIG. 3(a) illustrates the capacitor 22 voltage for magnitude unbalance of the three phase AC system voltage. Under balanced magnitude conditions, the capacitor voltage would be a constant value, since all commutating voltages will have the same magnitude at their own 120 points.

FIG. 3(c) shows the commutating voltage waveform for one of the valves (for example valve 3) under severe harmonic content conditions, such that multiple zero crossings are apparent. The corresponding AC system monitor output A is shown in F1G.3(e) which is produced as a result of conditions on valve 5 comm utating voltage i.e., the valve whose commutating voltage is displaced 120 from valve 3). The effect of the double pulse output from the AC system monitor, is to cause a double sampling of the concerned commutating voltage at points wt.=1200 and wt. 120 6. (The sum of 1) 0 equals the degrees between the two positive going iero crossings of valve commutating voltage). Generally, there will be some magnitude difference between the sampled voltages at these two points, and as will become apparent later, for sufficient differences in magnitude the circuit will effect similar protective measures as for the case of general reductions in AC system voltage.

Under normal AC system conditions, capacitor 22 and resistor 29 have almost identical voltages across them as a result of the sampled voltage at the points wt. 120 of the commutating voltages. However, when a reduction in such voltages occurs, diode 24 becomes reverse biassed since capacitor 22 discharges only at a slow rate (T 150 microseconds) set by resistors 34 and 35. The voltage across resistor 29 follows the sampled voltage. Thus an error voltage is apparent between the differential inputs of amplifier 32, being given instantaneously by the reduction in voltage at the particular wt. 120 sampling point from the previously highest voltage at such sampling points. Therefore, the output of amplifier 32 goes from its previous value of approximately zero volts to some positive value, proportional to this error signal by the gain of this stage.

If at the next instant of sampling, the voltage is greater or equal to the previous highest voltage stored on capacitor 22, the error signal, hence amplifier 32 output, willrevert to zero. However, if the sampled voltages continue to reduce consecutively over some period determined by the duration of the disturbance, an error signal will exist continuously over this period, causing amplifier 32 output to remain positive over such a period. In either case, the particular input to the [3 limit circuit of FTC 13 has a time constant of 50 milliseconds associated with a diode capacitor storage arrangement similar to that of diode 24 and capacitor 22. The effect of this arrangement is to cause the B limit to be reduced from its new high value to its nominal setting with a time constant of 50 milliseconds; constant margin angle control then being resumed as the B limit is reduced toward the B value required for margin angle control. In addition a maximum value of B 55 is enforced in the B limit selector circuit.

FIG.3f of the drawings illustrates the manner of operation of the summing amplifier 32. Initially, assuming that there has been no distortion in the waveform of the AC system voltage, the value of the voltage stored on capacitors 21 and 22 will be represented by the voltage level V For so long as this condition persists, V will remain essentially constant at the instant of sampling, and the instantaneous input supplied from across resistor 22 is appropriately scaled to result in a zero output signal from summing amplifier 32 under this condition. However, upon the occurrence of a distortion in the voltage waveform such as is depicted at V in FIG. 3b or V in FIG. 3c, the instantaneous value of the sampled voltage V will drop below V in the manner shown in FIG. 3f. The summing amplifier 32 will then have supplied to its input a difference signal V -V depicted in FIG. 3g of the drawings.

The nature of the error control signal applied to the B limit circuit, is illustrated in FIG. 3h of the drawings which is somewhat exaggerated for convenience in viewing and wherein it will be seen that the highest value of the difference between the valve voltage sample stored on capacitor 24 and the instantaneous sample voltage will decay toward zero at the time constant T (50 milliseconds). So long as the output error control signal is under a threshold level representative of the B setting, the converter operates normally assuming that further voltage dips or unbalances do not appear again on the AC system. However, as indicated in FIGS. 3g and 3h, where the disturbance is sufficiently prolonged to affect the commutating voltage of the next succeeding thyristor valve to be fired, the error signal applied to the B limit circuit will again be stepped up to a level determined by the magnitude of the unbalance. From that point it again will proceed to discharge down at the time constant T towards zero error output representative of the undistorted commutating voltage waveform condition and the B limit circuit again assumes its,B setting. In this manner the firing angle of advance of the converter which operates under normal closed loop margin angle regulation for maximum efficiency under all normal operating conditions, is immediately increased up to the maximum value of B in response to the detection of voltage distortion on the AC system. The extent that B is advanced will be determined by the magnitude of the output error control signal.

The output error control signal from the voltage distortion detector circuit 16 is supplied directly to the B limit circuitry of the FTC 13 in parallel with and in addition to the normal regulation loop provided through the summing junction 15 and regulator 14. As a consequence the voltage distortion detection and control circuit will be fast responding, and is capable of increasing the minimum B limit of the very next thyristor valve to be fired in the power converter. Where a 12 pulse bridge arrangement is employed, the error signals from the two separate voltage distortion detection circuits l6 and 16' are OR gated through an appropriate OR gate included at the input of the B limit circuit in FTC 13. The maximum error control signal then would be selected and applied to the B limit circuit for controlling operation of the converter.

From the foregoing description, it will be appreciated that the present invention provides a novel voltage distortion detection and control method and circuit for use with HVDC converters and the like which is fast acting in response to the occurrence of transient disturbances on the AC system that result in distortion of the commutating voltage available for the thyristor valves of the converter. Upon detection of a voltage distortion condition, the invention rapidly advances the firing angle of advance B of next thyristor valve in the converter to be fired thereby assuring an adequate margin angle and safe tum-off of the companion outgoing valve despite the anticipated reduction in its commutating voltage.

Having described one embodiment of a novel voltage distortion detection and control method and circuit for HVDC converters and the like constructed in accordance with the invention, it is believed obvious that other modifications and variations of the invention are possible in the light of the above teachings. It is therefore to be understood that changes may be made in the particular embodiment in the invention described which are within the full intended scope of the invention as defined by the appended claims.

What is claimed is: r

l. A voltage distortion detection and control circuit for a line voltage commutated transformer-coupled thyristor bridge power converter comprised of a plural? ity of thyristor valves, said circuit including valve voltage sampling means for sampling the value of the commutating voltage across the respective thyristor valves of a power converter, means for developing a sample point switching signal indicative of a particular point in a thyristor valve commutating voltage waveform where the value of the commutating voltage will be sampled, valve voltage sample signal storing means, switching means responsive to said valve voltage sampling means and to said sample point switching signal and coupled to said sample signal storage means for sequentially supplying to said sample signal storage means the sampled voltage values of the respective thyristor valves,

and comparison circuit meansicoupled to said signal storage meansfor comparing the instantaneous value of a sample valve voltage to the sample valve voltage value of the previously conducting thyristor valve and deriving an output error signal indicative of any differoutput error control signal is applied to the controllable B limit circuit means for immediately increasing the value of the minimum B limit for the next thyristor valve in the converter to be rendered conductive.

3. A voltage distortion detection and control circuit according to claim 2 wherein the increase in the value of the minimum B limit is in proportion to the value of the output error control signal.

4. A voltage distortion detection and control circuit according to claim 2 wherein the power converter includes a normal control regulation loop for controlling operation of the firing time computer and hence the firing of the thyristor 'valves of the converter to maintain a predetermined margin angle, the control loop provided through the voltage distortion detection and control circuit is parallel with and in addition to the normal control regulation loop and possesses a much faster speed of response, and circuit means are coupled to the voltage distortion anddetection circuit for reducing the minimum B limit back to the normal B value within a predetermined time constant within which the distortion condition normally will have cleared.

5. A voltage distortion detection and control circuit according to claim 1 wherein the converter is designed for operation at 60 cycles/sec and the means for developing a sample point-switching signal comprises tertiary transformer means coupled to the power converter transformer windings and connected to supply a replica of the commutating voltage displaced 120 in phase from the commutating voltage to be sampled, and level detecting and waveshaping monitor circuit means coupled to said tertiary transformer-means for deriving the sample point switching signal in response to a zero crossing of said replica, whereby multiple output sample point switching signals are derived in the presence of harmonic distortions that cause multiple zero crossings of the commutating voltage waveform.

6. A voltage distortion detection and control circuit according to claim 5 wherein the power converter is capable of operating in the inverting mode and includes firing time computer means for supplying appropriately timed firing signals to control conduction of the respective thyristor valves in the converter, said firing time computer means including controllable B limit circuit means for limiting the minimum firing angle of advance B of the thyristor valves to a normal B value, and wherein the output error control signal is applied to the controllable B limit circuit means for rapidly increasing the minimum B limit to a value higher than B 7. A voltage distortion detection and control circuit according to claim 6 where the minimum Blimit is increased an amount proportional to the value of the output error control signal.

8. A voltage distortion detection and control circuit according to claim 7 wherein the power converter includes a normal control regulation loop for controlling operation of the firing time computer and hence the firing of the thyristor valves of the converter to maintain a predetermined margin angle, the control loop provided through the voltage distortion detection and con-. trol circuit is parallel with and in addition to the normal control regulation loop and possesses a much faster speed of response, and circuit means are coupled to the voltage distortion and detection circuit for reducing the firing angle of advance B back to the value established by the normal control regulation loop within a prede: termined time constant within which the distortion condition normally will have cleared.

9. A voltage distortion detection and control circuit according to claim 8 wherein the power converter is high voltage direct current (HVDC) power converter capable of converting alternating current to high voltage direct current while operated in the rectifying mode and capable of converting high voltage direct current to alternating current while operated in the inverting mode.

10. A voltage distortion and detection circuit according to claim 9 wherein the switching means comprises transistor switching means for each valve pair in the thyristor bridge power converter with each transistor switching means having at least two input terminals and an output terminal, the valve voltage sampling means for both thyristor valves in the pair being coupled to one input terminal, the sample point switching signal being supplied to the remaining input terminal, and the output terminal of all the transistor switching means being connected in common to the valve voltage sample signal storage means, wherein said valve voltage sample signal storage means comprises a first capacitor connected in common to all of the output terminals of the transistor switching means and a second storage capacitor coupled through a unity gain coupling circuit means to the first storage capacitor for storing a sampled thyristor valve voltage from one thyristor valve conduction interval to the next, and wherein said comparison circuit means comprises summing circuit means having one input coupled to said second storage capacitor and a second input coupled to the output from the unity gain coupling circuit means for summing together the instantaneous value of a freshly sampled thyristor valve voltage and the value of the voltage sample of the previously conducting thyristor valve stored on the second capacitor and deriving an output error signal indicative of any difference. 11. A voltage distortion and detection circuit according to claim 1 wherein the switching means comprises transistor switching means for each valve pair in the thyristor bridge power converter with each transistor switching means having at least two input terminals and an output terminal, the valve voltage sampling means for both thyristor valves in the pair being coupled to one input terminal, the sample point switching signal being supplied to the remaining input terminal, and the output terminal of all the transistor switching means being connected in common to the valve voltage sample signal storage means, wherein said valve voltage sample signal storage means comprises a first capacitor connected in common to all of the output terminals of the transistor switching means and a second storage capacitor coupled through a unity gain coupling circuit means to the first storage capacitor for storing a sampled thyristor valve voltage from one thyristor valve conduction interval to the next, and wherein said comparison circuit means comprises summing circuit means having one input coupled to said second storage capacitor and a second input coupled to the output from the unity gain coupling circuit means for summing together the instantaneous value of a freshly sampled thyristor valve voltage and the value of thevoltage sample of the previously conducting thyristor valve stored on the second capacitor and deriving an output error signal indicative of any difference.

12. A voltage distortion detection and control circuit according to claim 11 wherein the converter is designed for operation at 60 cycles/sec and the means for developing a sample point switching signal comprises tertiary transformer means coupled to the power converter transformer windings and connected to supply a replica of the phase to phase voltage displaced 120 in phase from the commutating voltage to be sampled as the sample point switching signal.

13. A method of controlling line voltage commutated thyristor bridge power converters operated in the inverting mode and including a plurality of successively conducting thyristor valves, said method including sampling the value of the thyristor valve commutating voltage appearing across the respective thyristor valves at a particular point in a cycle in advance of commutation, comparing the instantaneous value of a freshly sampled thyristor valve voltage toa stored value of the valve voltage of the previously conducting thyristor valve, detecting any difference between the instantaneous and stored values of valve voltage for use as an output error control signal, and directly applying the output error control signal back to control the firing angle of the next thyristor valve to fire in the power converter.

14. A method according to claim 13 wherein the power converter being controlled includes a normal control regulation loop for normally controlling the firing angle B of the converter to maintain a predetermined margin angle, the output error control signal is supplied back in parallel with and in addition to the normal control regulation loop as a fast responding control capable of advancing the firing angle [3 of the next thyristor valve to be rendered conductive, and the firing angle B subsequently is reduced back down to normal value over a predetermined time constant within which the distortion normally should clear, 

1. A voltage distortion detection and control circuit for a line voltage commutated transformer-coupled thyristor bridge power converter comprised of a plurality of thyristor valves, said circuit including valve voltage sampling means for sampling the value of the commutating voltage across the respective thyristor valves of a power converter, means for developing a sample point switching signal indicative of a particular point in a thyristor valve commutating voltage waveform where the value of the commutating voltage will be sampled, valve voltage sample signal storing means, switching means responsive to said valve voltage sampling means and to said sample point switching signal and coupled to said sample signal storage means for sequentially supplying to said sample signal storage means the sampled voltage values of the respective thyristor valves, and comparison circuit means coupled to said signal storage means for comparing the instantaneous value of a sample valve voltage to the sample valve voltage value of the previously conducting thyristor valve and deriving an output error signal indicative of any difference for use in controlling the operation of the power converter.
 2. A voltage distortion detection and control circuit according to claim 1 wherein the power converter is capable of operating in the inverting mode and includes firing time computer means for supplying appropriately timed firing signals to control conduction of the respective thyristor valves in the converter, said firing time computer means including controllable limit circuit means for limiting the firing angle of advance Beta of the thyristor valves to a normal Beta MIN value, and wherein the output error control signal is applied to the controllable Beta limit circuit means for immediately increasing the value of the minimum Beta limit for the next thyristor valve in the converter to be rendered conductive.
 3. A voltage distortion detection and control circuit according to claim 2 wherein the increase in the value of the minimum Beta limit is in proportion to the value of the output error control signal.
 4. A voltage distortion detection and control circuit according to claim 2 whErein the power converter includes a normal control regulation loop for controlling operation of the firing time computer and hence the firing of the thyristor valves of the converter to maintain a predetermined margin angle, the control loop provided through the voltage distortion detection and control circuit is parallel with and in addition to the normal control regulation loop and possesses a much faster speed of response, and circuit means are coupled to the voltage distortion and detection circuit for reducing the minimum Beta limit back to the normal BMIN value within a predetermined time constant within which the distortion condition normally will have cleared.
 5. A voltage distortion detection and control circuit according to claim 1 wherein the converter is designed for operation at 60 cycles/sec and the means for developing a sample point switching signal comprises tertiary transformer means coupled to the power converter transformer windings and connected to supply a replica of the commutating voltage displaced 120* in phase from the commutating voltage to be sampled, and level detecting and waveshaping monitor circuit means coupled to said tertiary transformer-means for deriving the sample point switching signal in response to a zero crossing of said replica, whereby multiple output sample point switching signals are derived in the presence of harmonic distortions that cause multiple zero crossings of the commutating voltage waveform.
 6. A voltage distortion detection and control circuit according to claim 5 wherein the power converter is capable of operating in the inverting mode and includes firing time computer means for supplying appropriately timed firing signals to control conduction of the respective thyristor valves in the converter, said firing time computer means including controllable Beta limit circuit means for limiting the minimum firing angle of advance Beta of the thyristor valves to a normal Beta MIN value, and wherein the output error control signal is applied to the controllable Beta limit circuit means for rapidly increasing the minimum Beta limit to a value higher than Beta MIN.
 7. A voltage distortion detection and control circuit according to claim 6 where the minimum Beta limit is increased an amount proportional to the value of the output error control signal.
 8. A voltage distortion detection and control circuit according to claim 7 wherein the power converter includes a normal control regulation loop for controlling operation of the firing time computer and hence the firing of the thyristor valves of the converter to maintain a predetermined margin angle, the control loop provided through the voltage distortion detection and control circuit is parallel with and in addition to the normal control regulation loop and possesses a much faster speed of response, and circuit means are coupled to the voltage distortion and detection circuit for reducing the firing angle of advance Beta back to the value established by the normal control regulation loop within a predetermined time constant within which the distortion condition normally will have cleared.
 9. A voltage distortion detection and control circuit according to claim 8 wherein the power converter is high voltage direct current (HVDC) power converter capable of converting alternating current to high voltage direct current while operated in the rectifying mode and capable of converting high voltage direct current to alternating current while operated in the inverting mode.
 10. A voltage distortion and detection circuit according to claim 9 wherein the switching means comprises transistor switching means for each valve pair in the thyristor bridge power converter with each transistor switching means having at least two input terminals and an output terminal, the valve voltage sampling means for both thyristor valves in the pair being coupled to one input terminal, the sample point switching signal being supplied to the remAining input terminal, and the output terminal of all the transistor switching means being connected in common to the valve voltage sample signal storage means, wherein said valve voltage sample signal storage means comprises a first capacitor connected in common to all of the output terminals of the transistor switching means and a second storage capacitor coupled through a unity gain coupling circuit means to the first storage capacitor for storing a sampled thyristor valve voltage from one thyristor valve conduction interval to the next, and wherein said comparison circuit means comprises summing circuit means having one input coupled to said second storage capacitor and a second input coupled to the output from the unity gain coupling circuit means for summing together the instantaneous value of a freshly sampled thyristor valve voltage and the value of the voltage sample of the previously conducting thyristor valve stored on the second capacitor and deriving an output error signal indicative of any difference.
 11. A voltage distortion and detection circuit according to claim 1 wherein the switching means comprises transistor switching means for each valve pair in the thyristor bridge power converter with each transistor switching means having at least two input terminals and an output terminal, the valve voltage sampling means for both thyristor valves in the pair being coupled to one input terminal, the sample point switching signal being supplied to the remaining input terminal, and the output terminal of all the transistor switching means being connected in common to the valve voltage sample signal storage means, wherein said valve voltage sample signal storage means comprises a first capacitor connected in common to all of the output terminals of the transistor switching means and a second storage capacitor coupled through a unity gain coupling circuit means to the first storage capacitor for storing a sampled thyristor valve voltage from one thyristor valve conduction interval to the next, and wherein said comparison circuit means comprises summing circuit means having one input coupled to said second storage capacitor and a second input coupled to the output from the unity gain coupling circuit means for summing together the instantaneous value of a freshly sampled thyristor valve voltage and the value of the voltage sample of the previously conducting thyristor valve stored on the second capacitor and deriving an output error signal indicative of any difference.
 12. A voltage distortion detection and control circuit according to claim 11 wherein the converter is designed for operation at 60 cycles/sec and the means for developing a sample point switching signal comprises tertiary transformer means coupled to the power converter transformer windings and connected to supply a replica of the phase to phase voltage displaced 120* in phase from the commutating voltage to be sampled as the sample point switching signal.
 13. A method of controlling line voltage commutated thyristor bridge power converters operated in the inverting mode and including a plurality of successively conducting thyristor valves, said method including sampling the value of the thyristor valve commutating voltage appearing across the respective thyristor valves at a particular point in a cycle in advance of commutation, comparing the instantaneous value of a freshly sampled thyristor valve voltage to a stored value of the valve voltage of the previously conducting thyristor valve, detecting any difference between the instantaneous and stored values of valve voltage for use as an output error control signal, and directly applying the output error control signal back to control the firing angle of the next thyristor valve to fire in the power converter.
 14. A method according to claim 13 wherein the power converter being controlled includes a normal control regulation loop for normally controlling the firing angle Beta of the converter to maintain a predetermined margin angle, thE output error control signal is supplied back in parallel with and in addition to the normal control regulation loop as a fast responding control capable of advancing the firing angle Beta of the next thyristor valve to be rendered conductive, and the firing angle Beta subsequently is reduced back down to normal value over a predetermined time constant within which the distortion normally should clear. 